A 4th -order continuous-time band-pass filter for wireless receivers is here presented. The filter is composed by the cascade of two active RC cells. The overall pass-band (32dB) gain is distributed for each cell in order to minimiz. The power consumption. The operating point issues due to the low VDD/VTH ratio - a value of 2 is typical in CMOS 65nm technologies and down - have been solved by adding a proper bias circuit to the filter. The 7@-3dB deviation due to the technological spread, aging and temperature in active RC circuits is adjusted by using variable capacitor with 4 bits of resolution. The device in 65nm CMOS technology consumes 1.3mW from a single 1.2V supply voltage, features -10dBm-IIP3 and 1.6mVrms output integrated noise ove. The pass-band - 300kHz÷8MHz. ©2009 IEEE.
DE MATTEIS, M., D'Amico, S., Andriulo, P., Cocciolo, G., Baschirotto, A. (2009). A 4^th order CMOS 65nm wideband low power analog filter for wireless receivers. In Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on (pp.191-194) [10.1109/ICECS.2009.5410968].
A 4^th order CMOS 65nm wideband low power analog filter for wireless receivers
DE MATTEIS, MARCELLO;BASCHIROTTO, ANDREA
2009
Abstract
A 4th -order continuous-time band-pass filter for wireless receivers is here presented. The filter is composed by the cascade of two active RC cells. The overall pass-band (32dB) gain is distributed for each cell in order to minimiz. The power consumption. The operating point issues due to the low VDD/VTH ratio - a value of 2 is typical in CMOS 65nm technologies and down - have been solved by adding a proper bias circuit to the filter. The 7@-3dB deviation due to the technological spread, aging and temperature in active RC circuits is adjusted by using variable capacitor with 4 bits of resolution. The device in 65nm CMOS technology consumes 1.3mW from a single 1.2V supply voltage, features -10dBm-IIP3 and 1.6mVrms output integrated noise ove. The pass-band - 300kHz÷8MHz. ©2009 IEEE.
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