In this paper a 11MHz-f(@-3dB) continuous-time analog filter is presented. A low-noise circuital topology has been used based on typical Active-RC cells, like opamp-based integrators, and Active-G(m)-RC biquadratic cell. The basic idea is to synthesize two complex poles pairs (4(th)-Order Filter) using a single compact Active RC cell, which minimizes the in-band noise power contributions. A filter prototype, complying with WLAN baseband requirements, has been designed in CMOS 90nm technology. Thanks to noise power spectral density reduction - 48 mu V-rms output integrated noise (100kHz divided by 11MHz) at 0dB-pass-band gain - wide Dynamic Range (84dB@THD > 40dBc) is performed. In-band IIP3 is 10dBm, while the filter power consumption is 14mW
DE MATTEIS, M., Pezzotta, A., Baschirotto, A. (2011). 4^th -Order 84dB-DR CMOS-90nm low-pass filter for WLAN receivers. In 2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) (pp.1644-1647). IEEE [10.1109/ISCAS.2011.5937895].
4^th -Order 84dB-DR CMOS-90nm low-pass filter for WLAN receivers
DE MATTEIS, MARCELLO;PEZZOTTA, ALESSANDRO;BASCHIROTTO, ANDREA
2011
Abstract
In this paper a 11MHz-f(@-3dB) continuous-time analog filter is presented. A low-noise circuital topology has been used based on typical Active-RC cells, like opamp-based integrators, and Active-G(m)-RC biquadratic cell. The basic idea is to synthesize two complex poles pairs (4(th)-Order Filter) using a single compact Active RC cell, which minimizes the in-band noise power contributions. A filter prototype, complying with WLAN baseband requirements, has been designed in CMOS 90nm technology. Thanks to noise power spectral density reduction - 48 mu V-rms output integrated noise (100kHz divided by 11MHz) at 0dB-pass-band gain - wide Dynamic Range (84dB@THD > 40dBc) is performed. In-band IIP3 is 10dBm, while the filter power consumption is 14mW
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