This paper presents the development of a 10b ADC dedicated to the digitalization of a sensing current within advanced automotive applications. The presented ADC has been developed in a power optimized BCD technology, i.e. a process specifically optimized for power delivery and featuring signal processing capabilities. However it presents some limitations, i.e. highly non-linear capacitances, large mismatch, etc.. In this scenario a 10b ADC has been developed by means of a customized MATLAB model enabling the target performance achievements. The aim of this work is to study the effect of non-ideal components on the conversion performances focusing in particular on the technology limitations, like capacitors non-linearity and components mismatch. In order to achieve this, a Matlab model has been developed and then a demonstrator circuit has been designed at transistor level.
D'Amico, A., Brugger, F., Härle, D., Petruzzi, L., Baschirotto, A. (2016). A 10 bit A-to-D converter development within power optimized BCD technology. In 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) Conference Proceeding. Institute of Electrical and Electronics Engineers Inc. [10.1109/PRIME.2016.7519505].
A 10 bit A-to-D converter development within power optimized BCD technology
D'AMICO, ANTONIOPrimo
;BASCHIROTTO, ANDREAUltimo
2016
Abstract
This paper presents the development of a 10b ADC dedicated to the digitalization of a sensing current within advanced automotive applications. The presented ADC has been developed in a power optimized BCD technology, i.e. a process specifically optimized for power delivery and featuring signal processing capabilities. However it presents some limitations, i.e. highly non-linear capacitances, large mismatch, etc.. In this scenario a 10b ADC has been developed by means of a customized MATLAB model enabling the target performance achievements. The aim of this work is to study the effect of non-ideal components on the conversion performances focusing in particular on the technology limitations, like capacitors non-linearity and components mismatch. In order to achieve this, a Matlab model has been developed and then a demonstrator circuit has been designed at transistor level.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.